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Wideband Analog-to-Digital Converter (ADC) design for power amplifiers linearization

Abstract : Power consumption is nowadays one of the main challenges to overcome in the development of mobile communications networks. The power amplifier (PA) is the most power hungry component in base transceiver stations. The upcoming fifth generation of mobile telephony with wider communication bands and complex modulations further increases the constraints on the PA. To overcome this problem, it is common to use predistortion techniques that enable the power amplifier to operate with greater linearity and efficiency. An important constraint in the implementation of this technique is the digitization of the output of the amplifier which, due to non-linearities, spreads over a significantly wider spectrum than the initial signal, about 5 times in practice or even more. Pipeline Analog-to-Digital Converters (ADCs) are commonly used for this operation because it allows resolutions of greater than 10 bits to be obtained over a band of several tens or even hundreds of MHz. However, its high energy consumption pushes to find a better solution. The "Multi Stage Noise Band Cancellation" (MSNBC) architecture based on Delta Sigma modulators has the advantage of realizing different dynamics per subband and is thus a prime candidate for the feedback loop ADC of predistortion techniques. The purpose of this work is to demonstrate the feasibility of the MSNBC architecture that has so far only been studied at the system level. Our investigations allowed us to propose a suitable architecture to digitize a 20 MHz RF band signal with different resolutions per subband. A continuous time Zero-IF architecture with a second-order primary modulator and a fourth-order secondary modulator with 4-bit quantizers was adopted. This architecture has been implemented in a 65 nm CMOS technology. Transistor level simulations of the 2-4 MSNBC architecture simulations with an LTE test signal resulted in 84.5 dB SNDR in the main band and 29.2 dB in the adjacent band which contains the intermodulation products.
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Submitted on : Tuesday, July 6, 2021 - 4:59:11 PM
Last modification on : Wednesday, November 3, 2021 - 6:23:01 AM
Long-term archiving on: : Thursday, October 7, 2021 - 7:04:41 PM


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  • HAL Id : tel-03279780, version 1


Kelly Tchambake Yapti. Wideband Analog-to-Digital Converter (ADC) design for power amplifiers linearization. Electronics. Université Paris Saclay (COmUE), 2019. English. ⟨NNT : 2019SACLT047⟩. ⟨tel-03279780⟩



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