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Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology

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hal-02271687 , version 1 (27-08-2019)

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  • HAL Id : hal-02271687 , version 1

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Jean-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, et al.. Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. 2018 21st Euromicro Conference on Digital System Design (DSD), Aug 2018, Prague, Czech Republic. pp.508-515. ⟨hal-02271687⟩
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