A Statistical Method for Transistor Ageing and Process Variation Applied to Reliability Simulation - Archive ouverte HAL Access content directly
Conference Papers Year : 2012

A Statistical Method for Transistor Ageing and Process Variation Applied to Reliability Simulation

Hao Cai
  • Function : Author
Secure and Safe Hardware
Département Communications & Electronique
H. Petit
  • Function : Author
  • PersonId : 1184736
Circuits et Systèmes de Communication
Département Communications & Electronique
J. F. Naviner
  • Function : Author
  • PersonId : 1184743

Domains

Engineering Sciences [physics] Micro and nanotechnologies/Microelectronics

TelecomParis HAL  : Connect in order to contact the contributor

https://hal.telecom-paris.fr/hal-02286335

Submitted on : Friday, September 13, 2019-3:37:23 PM

Last modification on : Tuesday, February 28, 2023-3:36:25 PM

Not file

Dates and versions

hal-02286335 , version 1 (13-09-2019)

Identifiers

  • HAL Id : hal-02286335 , version 1

Cite

Hao Cai, H. Petit, J. F. Naviner. A Statistical Method for Transistor Ageing and Process Variation Applied to Reliability Simulation. 3rd European Workshop on CMOS variability, Jun 2012, Nice – Sophia Antipolis, France. ⟨hal-02286335⟩

Export

BibTeX TEI Dublin Core DC Terms EndNote Datacite

Collections

INSTITUT-TELECOM PARISTECH LTCI COMELEC C2S-CIRCUITS SSH
20 View
0 Download

Share

Gmail Facebook Twitter LinkedIn More