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Conference papers
Formalization of Design Patterns for Security and DependabilityFormalization of Design Patterns for Security and Dependability
Cuauhtemoc Castellanos
1, 2
Etienne Borde
1, 2
Laurent Pautet
1, 2
Thomas Vergnaud
Thomas Dérive
1
ACES - Autonomic and Critical Embedded Systems
LTCI - Laboratoire Traitement et Communication de l'Information
Cuauhtemoc Castellanos 1, 2
Author
Etienne Borde 1, 2
Author IdHAL : etienne-borde
Laurent Pautet 1, 2
Author IdHAL : laurent-pautet
Thomas Vergnaud
Author
Thomas Dérive
Author
1
ACES - Autonomic and Critical Embedded Systems (46 rue Barrault
75013 Paris - France)
- LTCI - Laboratoire Traitement et Communication de l'Information (19 Place Marguerite Perey 91120 PALAISEAU - France)
- IMT - Institut Mines-Télécom [Paris] (37-39 Rue Dareau, 75014 Paris - France)
- Télécom Paris (19 Place Marguerite Perey 91120 Palaiseau - France)
2
INFRES - Département Informatique et Réseaux (46, rue Barrault
75013 Paris - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
Document type :
Conference papers
Complete list of metadatas
https://hal.telecom-paris.fr/hal-02286706
Contributor : Telecomparis Hal <>
Submitted on : Friday, September 13, 2019 - 4:04:22 PM
Last modification on : Wednesday, September 30, 2020 - 8:54:13 AM
Contributor : Telecomparis Hal <>
Submitted on : Friday, September 13, 2019 - 4:04:22 PM
Last modification on : Wednesday, September 30, 2020 - 8:54:13 AM
Identifiers
- HAL Id : hal-02286706, version 1
Collections
LTCI | PARISTECH | INSTITUT-TELECOM | INFRES | ACES
Citation
Cuauhtemoc Castellanos, Etienne Borde, Laurent Pautet, Thomas Vergnaud, Thomas Dérive. Formalization of Design Patterns for Security and DependabilityFormalization of Design Patterns for Security and Dependability. ISARCS'13, Aug 2013, Montréal, Canada. ⟨hal-02286706⟩
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