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A Fully Digital Background Calibration of Timing Skew in TI-ADC

Han Le Duc 1, 2 V. T. Nguyen 1, 2 Patricia Desgreys 1, 2 Chadi Jabbour 1, 2 Olivier Jamin 1, 2 
1 C2S - Circuits et Systèmes de Communication
LTCI - Laboratoire Traitement et Communication de l'Information
Abstract : Abstract—Sample-time mismatches between the channels of Time-Interleaved Analog-to-Digital Converters (TI-ADC) generate unwanted distortions in the output spectrum. This paper presents a digital background calibration of timing skew error for a two channel TI-ADC.
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Conference papers
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Submitted on : Friday, September 13, 2019 - 4:24:04 PM
Last modification on : Friday, April 1, 2022 - 6:00:02 PM


  • HAL Id : hal-02286956, version 1


Han Le Duc, V. T. Nguyen, Patricia Desgreys, Chadi Jabbour, Olivier Jamin. A Fully Digital Background Calibration of Timing Skew in TI-ADC. GDR SOC-SIP, Jun 2013, Lyon, France. ⟨hal-02286956⟩



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