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A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation

Sho Endo yang Li Naofumi Homma 1, 2 Kazuo Sakiyama Kazuo Ohta Daisuke Fujimoto Makoto Nagata Toshihiro Katashita Jean-Luc Danger 1, 2 Takafumi Aoki 
1 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
2 COMELEC - Département Communications & Electronique
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https://hal.telecom-paris.fr/hal-02287186
Contributor : TelecomParis HAL Connect in order to contact the contributor
Submitted on : Friday, September 13, 2019 - 4:41:22 PM
Last modification on : Thursday, November 18, 2021 - 1:02:02 PM

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INSTITUT-TELECOM | PARISTECH | UNIV-PARIS-SACLAY | LTCI | COMELEC | SSH

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Sho Endo, yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, et al.. A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2015, ⟨10.1109/TVLSI.2014.2339892⟩. ⟨hal-02287186⟩

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