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Book sections
Safety and Deferred Update in Transactional Memory
Hagit Attiya
Sandeep Hans
Petr Kuznetsov
1, 2
Srivatsan Ravi
1
ACES - Autonomic and Critical Embedded Systems
LTCI - Laboratoire Traitement et Communication de l'Information
1
ACES - Autonomic and Critical Embedded Systems (46 rue Barrault
75013 Paris - France)
- LTCI - Laboratoire Traitement et Communication de l'Information (46 rue Barrault F-75634 Paris Cedex 13 - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
- IMT - Institut Mines-Télécom [Paris] (37-39 Rue Dareau, 75014 Paris - France)
2
INFRES - Département Informatique et Réseaux (46, rue Barrault
75013 Paris - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
Document type :
Book sections
Complete list of metadatas
https://hal.telecom-paris.fr/hal-02287873
Contributor : Telecomparis Hal <>
Submitted on : Friday, September 13, 2019 - 5:27:06 PM
Last modification on : Wednesday, June 24, 2020 - 4:19:51 PM
Contributor : Telecomparis Hal <>
Submitted on : Friday, September 13, 2019 - 5:27:06 PM
Last modification on : Wednesday, June 24, 2020 - 4:19:51 PM
Identifiers
- HAL Id : hal-02287873, version 1
- DOI : 10.1007/978-3-319-14720-8_3
Collections
LTCI | PARISTECH | INSTITUT-TELECOM | INFRES | ACES
Citation
Hagit Attiya, Sandeep Hans, Petr Kuznetsov, Srivatsan Ravi. Safety and Deferred Update in Transactional Memory. Transactional Memory. Foundations, Algorithms, Tools, and Applications - COST Action Euro-TM IC1001, pp.50-71, 2015, ⟨10.1007/978-3-319-14720-8_3⟩. ⟨hal-02287873⟩
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