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Using FPGA self-produced transients to emulate SETs for SER estimation

Fabio Batagin Armelin Lirida Alves de Barros Naviner 1, 2 Roberto d'Amore
1 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
2 COMELEC - Département Communications & Electronique
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Conference papers
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https://hal.telecom-paris.fr/hal-02288530
Contributor : Telecomparis Hal <>
Submitted on : Saturday, September 14, 2019 - 6:55:16 PM
Last modification on : Friday, September 18, 2020 - 7:50:03 AM

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  • HAL Id : hal-02288530, version 1

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LTCI | PARISTECH | INSTITUT-TELECOM | COMELEC | SSH | UNIV-PARIS-SACLAY

Citation

Fabio Batagin Armelin, Lirida Alves de Barros Naviner, Roberto d'Amore. Using FPGA self-produced transients to emulate SETs for SER estimation. Proceedings of IEEE Latin American Test Symposium (LATS), Mar 2018, São Paulo, SP, Brazil. ⟨hal-02288530⟩

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