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Conference papers
Reliability-aware Delay Faults Evaluation of CMOS Flip-Flops
1
SSH - Secure and Safe Hardware (46 rue Barrault
75013 Paris - France)
- LTCI - Laboratoire Traitement et Communication de l'Information (46 rue Barrault F-75634 Paris Cedex 13 - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
- IMT - Institut Mines-Télécom [Paris] (37-39 Rue Dareau, 75014 Paris - France)
2
COMELEC - Département Communications & Electronique (46, rue Barrault
75013 Paris - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
Document type :
Conference papers
Complete list of metadatas
https://hal.telecom-paris.fr/hal-02412061
Contributor : Telecomparis Hal <>
Submitted on : Sunday, December 15, 2019 - 12:43:45 PM
Last modification on : Wednesday, June 24, 2020 - 4:19:55 PM
Contributor : Telecomparis Hal <>
Submitted on : Sunday, December 15, 2019 - 12:43:45 PM
Last modification on : Wednesday, June 24, 2020 - 4:19:55 PM
Identifiers
- HAL Id : hal-02412061, version 1
Collections
PARISTECH | COMELEC | SSH | LTCI | INSTITUT-TELECOM
Citation
Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner. Reliability-aware Delay Faults Evaluation of CMOS Flip-Flops. 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), Jun 2014, Lublin, Poland. ⟨hal-02412061⟩
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