Estimation techniques for timing mismatch in Time-interleaved Analog-to-Digital Converters: Limitations and solutions

Han Le Duc; Chadi Jabbour; Patricia Desgreys; V. T. Nguyen

Conference papers

Estimation techniques for timing mismatch in Time-interleaved Analog-to-Digital Converters: Limitations and solutions

Han Le Duc ^{1, 2} Chadi Jabbour ^{1, 2} Patricia Desgreys ^{1, 2} V. T. Nguyen ^{1, 2}

1 C2S - Circuits et Systèmes de Communication

LTCI - Laboratoire Traitement et Communication de l'Information

2 COMELEC - Département Communications & Electronique

Document type :

Conference papers

Domain :

Engineering Sciences [physics] / Electronics

Complete list of metadata

https://hal.telecom-paris.fr/hal-02412484
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Submitted on : Sunday, December 15, 2019 - 3:05:20 PM
Last modification on : Friday, April 1, 2022 - 6:00:02 PM

Estimation techniques for timing mismatch in Time-interleaved Analog-to-Digital Converters: Limitations and solutions

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Estimation techniques for timing mismatch in Time-interleaved Analog-to-Digital Converters: Limitations and solutions

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