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Patents
ON-CHIP MONITOR CIRCUIT AND SEMICONDUCTOR CHIP
Makoto Nagata
Author
Daisuke Fujimoto
Author
Jean-Luc Danger 1, 2
Mail : Site :
Author IdHAL : jeanluc-danger
Shivam Bhasin 1, 2
Author
1
SSH - Secure and Safe Hardware (46 rue Barrault
75013 Paris - France)
- LTCI - Laboratoire Traitement et Communication de l'Information (46 rue Barrault F-75634 Paris Cedex 13 - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
- IMT - Institut Mines-Télécom [Paris] (37-39 Rue Dareau, 75014 Paris - France)
2
COMELEC - Département Communications & Electronique (46, rue Barrault
75013 Paris - France)
- Télécom ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)
Domain :
Complete list of metadatas
https://hal.telecom-paris.fr/hal-02412551
Contributor : Telecomparis Hal <>
Submitted on : Sunday, December 15, 2019 - 3:37:23 PM
Last modification on : Thursday, December 19, 2019 - 1:11:18 AM
Contributor : Telecomparis Hal <>
Submitted on : Sunday, December 15, 2019 - 3:37:23 PM
Last modification on : Thursday, December 19, 2019 - 1:11:18 AM
Identifiers
- HAL Id : hal-02412551, version 1
Collections
INSTITUT-TELECOM | PARISTECH | COMELEC | SSH | LTCI
Citation
Makoto Nagata, Daisuke Fujimoto, Jean-Luc Danger, Shivam Bhasin. ON-CHIP MONITOR CIRCUIT AND SEMICONDUCTOR CHIP. Japan, Patent n° : JP20150004346 20150113. MN:OCM. 2015. ⟨hal-02412551⟩
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