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Demonstration of an Interactive System Level Simulation Environment for Systems-on-Chip

Abstract : This article presents an interactive simulation environment for high level models intended for Design Space Exploration of Systems- On-Chip. The existing open source development environment TTool supports the MARTE compliant UML profile DIPLODOCUS and enables the designer to create, simulate and formally verify models. The goal is to obtain first performance estimations of the system intended for design while minimizing the modeling effort. The contribution outlined in this paper is an additional module providing means for controlling the simulation in real time by performing step wise execution, saving and restoring simulation states as well as animating UML models of the system. Moreover the paper elaborates on the integration of these new features into the existing framework consisting of a simulation engine on the one hand and a graphical user interface on the other hand.
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https://hal.telecom-paris.fr/hal-02893150
Contributor : Renaud Pacalet <>
Submitted on : Wednesday, July 8, 2020 - 9:33:39 AM
Last modification on : Friday, July 31, 2020 - 11:28:04 AM

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  • HAL Id : hal-02893150, version 1

Citation

Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet. Demonstration of an Interactive System Level Simulation Environment for Systems-on-Chip. 10th annual international conference on New Technologies of Distributed Systems (NOTERE'2010), Jun 2010, Tozeur, Tunisia. ⟨hal-02893150⟩

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