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SecBus: Operating System controlled hierarchical page-based memory bus protection

Abstract : This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for each protected memory page. The hardware unit is located between the internal system bus and the memory controller. It protects the integrity and confidentiality of selected memory pages. For better acceptability the processor (CPU) architecture and the software application level are unmodified. The impact of the security on cost and performance is optimized by several algorithmic and hardware techniques and by a differentiated handling of memory pages, depending on their characteristics.
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https://hal.telecom-paris.fr/hal-02893203
Contributor : Renaud Pacalet <>
Submitted on : Wednesday, July 8, 2020 - 9:59:23 AM
Last modification on : Friday, July 31, 2020 - 10:44:09 AM

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Lifeng Su, S. Courcambeck, P. Guillemin, C. Schwarz, Renaud Pacalet. SecBus: Operating System controlled hierarchical page-based memory bus protection. 2009 Design, Automation & Test in Europe Conference & Exhibition (DATE'09), Apr 2009, Nice, France. pp.570-573, ⟨10.1109/DATE.2009.5090729⟩. ⟨hal-02893203⟩

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