Abstract : This paper presents a circuit dedicated to real-time motion estimation in video compression systems. It computes motion vectors in the range -8/+7 for 8x4n and 16x4n sized blocks at pixel rates up to 18 MHz. The architecture is based on a 128 processor systolic array. This 270000 transistor IC uses a 2 metal layer 1.2um CMOS process.
O. Colavin, A. Artieri, J.-F. Naviner, Renaud Pacalet. A dedicated circuit for real time motion estimation. Euro ASIC '91, May 1991, Paris, France. pp.96-99, ⟨10.1109/EUASIC.1991.212886⟩. ⟨hal-02893305⟩