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A 65 nm CMOS versatile ADC using time interleaving and ΣΔ modulation for multi-mode receiver

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https://hal.telecom-paris.fr/hal-03591883
Contributor : Chadi Jabbour Connect in order to contact the contributor
Submitted on : Monday, February 28, 2022 - 8:54:07 PM
Last modification on : Thursday, June 9, 2022 - 5:12:01 PM

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Ali Beydoun, Chadi Jabbour, Hussein Fakhoury, van Tam Nguyen, Lirida Naviner, et al.. A 65 nm CMOS versatile ADC using time interleaving and ΣΔ modulation for multi-mode receiver. 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA), Jun 2009, Toulouse, France. pp.1-4, ⟨10.1109/NEWCAS.2009.5290510⟩. ⟨hal-03591883⟩

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