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A 65nm CMOS EDGE/UMTS/WLAN tri-mode four-channel time-interleaved ΣΔ ADC

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https://hal.telecom-paris.fr/hal-03591973
Contributor : Chadi Jabbour Connect in order to contact the contributor
Submitted on : Tuesday, March 1, 2022 - 12:30:21 AM
Last modification on : Thursday, June 9, 2022 - 5:12:01 PM

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Hussein Fakhoury, Chadi Jabbour, Hasham Khushk, van Tam Nguyen, Patrick Loumeau. A 65nm CMOS EDGE/UMTS/WLAN tri-mode four-channel time-interleaved ΣΔ ADC. 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA), Jun 2009, Toulouse, France. pp.1-4, ⟨10.1109/NEWCAS.2009.5290508⟩. ⟨hal-03591973⟩

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